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TekWissen ® · Redmond, Washington
Position: FPGA Engineer
Redmond,WA
Duration: 9 Months
Job Type: Temporary Assignment
Work Type: Onsite
Shift Timings: Evening shifts starting at 6 PM with 8-9 hour shifts
Note:Candidates must be ready for on-call rotation within 4 weeks of onboarding
Pay Rate: $75.29-$75.29/HR
Bring up the AMD Versal SoC on our custom board, using the EVK as the reference design
Develop the BSP and drivers for Versal PS subsystems (APU and RPU)
Validate PL integration and peripherals, including IP instantiation, configuration, and AXI interfaces
Work with AMD and Xilinx on Versal platform tools (Vivado, Vitis, Yocto, and EDF)
Migrate Vivado toolchain from v2024.2 to v2026.1/v2026.2
Detailed understanding of the Versal boot architecture
The position supports Kuiper's Gen 2 satellite development, specifically working on architecture changes for hardware modules.
The position requires 3+ years of embedded software development experience with hands-on vessel bring-up expertise.
Essential technical skills include experience with Yocto and AMD/Xilinx SDK tool chain, proficiency in C/C++ (Python or Rust as additional languages), and hardware/software debugging capabilities.
Candidates should have detailed understanding of vessel boot architecture, though some flexibility exists on this requirement.
Candidates can come from various industries including space, defense, or any devices industry, as the required SOC expertise spans multiple sectors beyond aerospac
Leadership Principles
Bias for Action, Frugality, Earn Trust, Dive Deep, Have Backbone; Disagree and Commit, Deliver Results.
TekWissen® Group is an equal opportunity employer supporting workforce diversity.
Details
| Company | TekWissen ® |
| Location | Redmond, Washington |
| Type | FULL TIME |
| Niche | Full-time |